<< RPi Registers Index
Register Region: SLIM (0x7e210000
)
Info
Name | Value |
base | 0x7e210000 |
id | 0x736c696d |
Registers
Register Name | Address | Type | Width | Mask | Reset |
SLIM_CON | 0x7e210000 | RW | 32 | 0xfffff0ff | 0x000000c1 |
SLIM_CON2 | 0x7e210004 | RW | 32 | 0xff008001 | 0000000000 |
SLIM_STAT | 0x7e210008 | RW | 26 | 0x03ffffff | 0000000000 |
SLIM_FS | 0x7e21000c | RW | 14 | 0x00003fff | 0000000000 |
SLIM_EA0 | 0x7e210010 | RW | 32 | 0xffff00ff | 0000000000 |
SLIM_EA1 | 0x7e210014 | RW | 32 | 0x8000ffff | 0000000000 |
SLIM_DMA_MC_RX | 0x7e210020 | RW | 32 | 0xffffffff | 0000000000 |
SLIM_DMA_MC_TX | 0x7e210024 | RW | 32 | 0xffffffff | 0000000000 |
SLIM_DMA_DC0 | 0x7e210030 | RW | 32 | 0xffffffff | 0000000000 |
SLIM_DMA_DC1 | 0x7e210034 | RW | 32 | 0xffffffff | 0000000000 |
SLIM_DMA_DC2 | 0x7e210038 | RW | 32 | 0xffffffff | 0000000000 |
SLIM_DMA_DC3 | 0x7e21003c | RW | 32 | 0xffffffff | 0000000000 |
SLIM_DMA_DC4 | 0x7e210040 | RW | 32 | 0xffffffff | 0000000000 |
SLIM_DMA_DC5 | 0x7e210044 | RW | 32 | 0xffffffff | 0000000000 |
SLIM_DMA_DC6 | 0x7e210048 | RW | 32 | 0xffffffff | 0000000000 |
SLIM_DMA_DC7 | 0x7e21004c | RW | 32 | 0xffffffff | 0000000000 |
SLIM_DMA_DC8 | 0x7e210050 | RW | 32 | 0xffffffff | 0000000000 |
SLIM_DMA_DC9 | 0x7e210054 | RW | 32 | 0xffffffff | 0000000000 |
SLIM_DMA_MC_CON | 0x7e210080 | RW | 2 | 0x00000003 | 0000000000 |
SLIM_DMA_DC_CON | 0x7e210084 | RW | 20 | 0x000fffff | 0000000000 |
SLIM_DMA_MC_STAT | 0x7e210088 | RW | 4 | 0x0000000f | 0000000000 |
SLIM_DMA_DC_STAT_0 | 0x7e21008c | RW | 32 | 0xffffffff | 0000000000 |
SLIM_DMA_DC_STAT_1 | 0x7e210090 | RW | 20 | 0x000f000f | 0000000000 |
SLIM_MC_IN_CON | 0x7e210100 | RW | 12 | 0x00000f1d | 0000000000 |
SLIM_MC_IN_STAT | 0x7e210104 | RW | 4 | 0x0000000f | 0000000000 |
SLIM_MC_OUT_CON | 0x7e210120 | RW | 7 | 0x00000048 | 0000000000 |
SLIM_MC_OUT_STAT | 0x7e210124 | RW | 4 | 0x00000008 | 0000000000 |
SLIM_DCC0_PA0 | 0x7e210200 | RW | 24 | 0x00ffff1f | 0000000000 |
SLIM_DCC0_PA1 | 0x7e210204 | RW | 24 | 0x00ffff3f | 0000000000 |
SLIM_DCC0_CON | 0x7e210208 | RW | 32 | 0xffff0070 | 0000000000 |
SLIM_DCC0_STAT | 0x7e21020c | RW | 32 | 0xc0ff00c7 | 0000000000 |
SLIM_DCC0_PROT | 0x7e210210 | RW | 32 | 0xc001ffff | 0x000093a0 |
SLIM_DCC1_PA0 | 0x7e210220 | RW | 24 | 0x00ffff1f | 0000000000 |
SLIM_DCC1_PA1 | 0x7e210224 | RW | 24 | 0x00ffff3f | 0000000000 |
SLIM_DCC1_CON | 0x7e210228 | RW | 32 | 0xffff0070 | 0000000000 |
SLIM_DCC1_STAT | 0x7e21022c | RW | 32 | 0xc0ff00c7 | 0000000000 |
SLIM_DCC1_PROT | 0x7e210230 | RW | 32 | 0xc001ffff | 0x000093a0 |
SLIM_DCC2_PA0 | 0x7e210240 | RW | 24 | 0x00ffff1f | 0000000000 |
SLIM_DCC2_PA1 | 0x7e210244 | RW | 24 | 0x00ffff3f | 0000000000 |
SLIM_DCC2_CON | 0x7e210248 | RW | 32 | 0xffff0070 | 0000000000 |
SLIM_DCC2_STAT | 0x7e21024c | RW | 32 | 0xc0ff00c7 | 0000000000 |
SLIM_DCC2_PROT | 0x7e210250 | RW | 32 | 0xc001ffff | 0x000093a0 |
SLIM_DCC3_PA0 | 0x7e210260 | RW | 24 | 0x00ffff1f | 0000000000 |
SLIM_DCC3_PA1 | 0x7e210264 | RW | 24 | 0x00ffff3f | 0000000000 |
SLIM_DCC3_CON | 0x7e210268 | RW | 32 | 0xffff0070 | 0000000000 |
SLIM_DCC3_STAT | 0x7e21026c | RW | 32 | 0xc0ff00c7 | 0000000000 |
SLIM_DCC3_PROT | 0x7e210270 | RW | 32 | 0xc001ffff | 0x000093a0 |
SLIM_DCC4_PA0 | 0x7e210280 | RW | 24 | 0x00ffff1f | 0000000000 |
SLIM_DCC4_PA1 | 0x7e210284 | RW | 24 | 0x00ffff3f | 0000000000 |
SLIM_DCC4_CON | 0x7e210288 | RW | 32 | 0xffff0070 | 0000000000 |
SLIM_DCC4_STAT | 0x7e21028c | RW | 32 | 0xc0ff00c7 | 0000000000 |
SLIM_DCC4_PROT | 0x7e210290 | RW | 32 | 0xc001ffff | 0x000093a0 |
SLIM_DCC5_PA0 | 0x7e2102a0 | RW | 24 | 0x00ffff1f | 0000000000 |
SLIM_DCC5_PA1 | 0x7e2102a4 | RW | 24 | 0x00ffff3f | 0000000000 |
SLIM_DCC5_CON | 0x7e2102a8 | RW | 32 | 0xffff0070 | 0000000000 |
SLIM_DCC5_STAT | 0x7e2102ac | RW | 32 | 0xc0ff00c7 | 0000000000 |
SLIM_DCC5_PROT | 0x7e2102b0 | RW | 32 | 0xc001ffff | 0x000093a0 |
SLIM_DCC6_PA0 | 0x7e2102c0 | RW | 24 | 0x00ffff1f | 0000000000 |
SLIM_DCC6_PA1 | 0x7e2102c4 | RW | 24 | 0x00ffff3f | 0000000000 |
SLIM_DCC6_CON | 0x7e2102c8 | RW | 32 | 0xffff0070 | 0000000000 |
SLIM_DCC6_STAT | 0x7e2102cc | RW | 32 | 0xc0ff00c7 | 0000000000 |
SLIM_DCC6_PROT | 0x7e2102d0 | RW | 32 | 0xc001ffff | 0x000093a0 |
SLIM_DCC7_PA0 | 0x7e2102e0 | RW | 24 | 0x00ffff1f | 0000000000 |
SLIM_DCC7_PA1 | 0x7e2102e4 | RW | 24 | 0x00ffff3f | 0000000000 |
SLIM_DCC7_CON | 0x7e2102e8 | RW | 32 | 0xffff0070 | 0000000000 |
SLIM_DCC7_STAT | 0x7e2102ec | RW | 32 | 0xc0ff00c7 | 0000000000 |
SLIM_DCC7_PROT | 0x7e2102f0 | RW | 32 | 0xc001ffff | 0x000093a0 |
SLIM_DCC8_PA0 | 0x7e210300 | RW | 24 | 0x00ffff1f | 0000000000 |
SLIM_DCC8_PA1 | 0x7e210304 | RW | 24 | 0x00ffff3f | 0000000000 |
SLIM_DCC8_CON | 0x7e210308 | RW | 32 | 0xffff0070 | 0000000000 |
SLIM_DCC8_STAT | 0x7e21030c | RW | 32 | 0xc0ff00c7 | 0000000000 |
SLIM_DCC8_PROT | 0x7e210310 | RW | 32 | 0xc001ffff | 0x000093a0 |
SLIM_DCC9_PA0 | 0x7e210320 | RW | 24 | 0x00ffff1f | 0000000000 |
SLIM_DCC9_PA1 | 0x7e210324 | RW | 24 | 0x00ffff3f | 0000000000 |
SLIM_DCC9_CON | 0x7e210328 | RW | 32 | 0xffff0070 | 0000000000 |
SLIM_DCC9_STAT | 0x7e21032c | RW | 32 | 0xc0ff00c7 | 0000000000 |
SLIM_DCC9_PROT | 0x7e210330 | RW | 32 | 0xc001ffff | 0x000093a0 |
Unsupported Defines
Define | Value |
SLIM_CRX_DMA | 0xb0000 |
SLIM_CTX_DMA | 0xa0000 |
SLIM_DCC_BASE(n) | MACRO |
SLIM_DCC_CON(n) | MACRO |
SLIM_DCC_PA0(n) | MACRO |
SLIM_DCC_PA1(n) | MACRO |
SLIM_DCC_STAT(n) | MACRO |
SLIM_DRX_DMA | 0x90000 |
SLIM_DTX_DMA | 0x80000 |
SLIM_NUM_DCC | 10 |
Register info
<< RPi Registers Index